1. Field of the Invention
The present invention relates to an AD (analog-to-digital) conversion method and a semiconductor device for use in physical quantity distribution detection in which multiple unit components are arranged. More specifically, the invention relates to a technology that converts analogly outputted electric signals to digital data, the technique is suitable for use in a semiconductor device for use in physical quantity distribution detection such as a solid-state imaging device in which a physical quantity distribution can be optionally selected by addressing control to read as electric signals, the physical quantity distribution in which multiple unit components having sensitivity to electromagnetic waves such as light and radiation externally inputted are arranged and the unit components convert to electric signals. Particularly, the invention relates to a digital data conversion technology in dealing with color information such as a color image.
2. Description of the Related Art
A physical quantity distribution detection semiconductor device are used in various fields, in which multiple unit components (pixels, for example) having sensitivity to electromagnetic waves such as light and radiation externally inputted are arranged in a line or matrix.
For example, in the field of imaging devices, CCD (Charge Coupled Device), MOS (Metal Oxide Semiconductor), and CMOS (Complementary Metal-oxide Semiconductor) solid-state imaging devices are used, which detects light (an example of electromagnetic waves) among physical quantities. These devices read a physical quantity distribution that is converted to electric signals by unit components (pixels in a solid-state imaging device) as electric signals.
In the solid-state imaging devices, there is an amplified solid-state imaging device having a pixel of the configuration of an active pixel sensor (APS, also called a gain cell) that has an amplifying drive transistor in a pixel signal generating portion which generates a pixel signal in accordance with a signal charge generated by a charge generating portion. For example, most of the CMOS solid-state imaging devices have a configuration like this.
In order to read out a pixel signal to outside by the amplified solid-state imaging device like this, address control is done for a pixel portion where multiple unit pixels are arranged, and signals from the individual unit pixels are optionally selected and read out. More specifically, the amplified solid-state imaging device is an example of an address control type solid-state imaging device.
For example, the active pixel sensor, one kind of an X-Y addressing solid-state imaging device where unit pixels are arranged in a matrix, forms pixels using an active device (MOS transistor) of MOS structure for providing an amplification function to the pixel itself. More specifically, signal charge (photoelectron) stored in a photodiode, which is a photoelectric conversion device, is amplified by the active device to read them as image information.
In the X-Y addressing solid-state imaging device of this type, for example, a pixel portion is configured in which a large number of pixel transistors are arranged in a two-dimensional rows and columns, storing signal charge is started in response to incident light at every line (row) or pixel, and signals for current or voltage based on the stored signal charge are in turn read out of each pixel by addressing. Here, in MOS (including CMOS) type, a column parallel readout mode is often used as an example of address control, in which one rows are made access at the same time to read pixel signals by the row from a pixel portion (for example, see Patent Reference 1).
[Patent Reference 1] JP-A-2000-261602
In the solid-state imaging device, analog pixel signals read out of a pixel portion are converted to digital data by an analog-to-digital converter (AD converter), if desired. To this end, various AD conversion schemes are proposed. As an example, a scheme is considered that has a counter and a comparator which compares a sawtooth voltage waveform with an electric signal reflecting a pixel signal (including a pulse width signal) (for example, see Non-Patent References 1 to 5, and Patent References 2 and 3).
[Non-Patent Reference 1] W. Yang et. al., An Integrated 800×600 CMOS Image System, ISSCC Digest of Technical Papers, pp. 304-305, February, (1999)
[Non-Patent Reference 2] YONEMOTO Kazuya, CCD/CMOS image sensor no kiso to oyo, First Edition, pp. 201-203, CQ Publishing Co., Ltd., Aug. 10, 2003
[Non-Patent Reference 3] IMAMURA Toshihumi and YAMAMOTO Yoshiko, 3. Kosoku-kino CMOS image sensor no kenkyu, [online], [search on Mar. 15, 2004], Internet, <URL:http://www.sankaken.gr.jp/project/iwataPJ/report/h12/h12index.html>
[Non-Patent Reference 4] IMAMURA Toshihumi, YAMAMOTO Yoshiko and HASEGAWA Naoya, 3. Kosoku-kino CMOS image sensor no kenkyu, [online], [search on Mar. 15, 2004], Internet, <URL:http://www.sankaken.gr.jp/project/iwataPJ/report/h14/h14index.html>
[Non-Patent Reference 5] Oh-Bong Kwon et al., A Novel Double Slope Analog-to-Digital Converter for a High-Quality 640×480 CMOS Imaging System, Vol. 3-03 IEEE pp. 335-338 (1999)
[Patent Reference 2] JP-A-11-331883
[Patent Reference 3] JP-A-2002-232787
When a color image is handled, a scheme is considered in which when a sawtooth voltage waveform is compared with an electric signal reflecting a pixel signal for AD conversion, AD conversion is conducted in consideration of color properties of individual pixels having color filters of multiple colors to take color images.
For example, in the technology described in Patent Reference 1, when analog image data is converted to digital image data, reference voltages are generated that are different from each other in accordance with the analog image data property for particular color, and then comparison operation is conducted. Thus, when the analog image data outputted from the unit pixel is converted to digital image data, image data is adjusted depending on individual colors to allow more precise color control.
<The Configuration of a Traditional Solid-State Imaging Device>
FIG. 14 is a diagram illustrating the outline configuration of a solid-state imaging device (CMOS image sensor) in which an AD converter shown in FIG. 4 of Patent Reference 1 is mounted on the same semiconductor substrate as a pixel portion on.
This solid-state imaging device has an analog reference voltage generating portion which generates analog reference voltage that decreases from the initial voltage levels different from each other depending on individual color pixels at different reduction rates, a selecting portion which selectively outputs analog reference voltage depending on the individual color pixels in response to a selection signal, and a comparing portion which compares the analog reference voltage outputted from the selecting portion with analog image data outputted from a pixel array and outputs digital image data, in which analog image data sensed from the individual color pixels of the pixel array is converted to digital image data in accordance with the analog image data property of each color.
As a specific example, as shown in FIG. 14, the solid-state imaging device is configured to have an M (row lines)×N (column lines) pixel array 50 arranged in a Bayer pattern and an analog-to-digital converting portion 60 which converts an analog signal from the pixel array 50 to a digital signal.
The analog-to-digital converting portion 60 is configured to have analog reference voltage generators 601A (Blue), 601B (Green), and 601C (Red) which are prepared to each of color components R, G and B forming a Bayer pattern, comparators 603A and 603B which are disposed for each vertical column, and multiplexers 602A and 602B which select any one of reference signals from the analog reference voltage generators 601A, 601B and 601C and input it to the comparators 603A and 603B.
Here, the analog reference voltage generator is configured of the first reference voltage generator 601A which generates reference voltage with respect to a blue pixel, the second reference voltage generator 601B which generates reference voltage with respect to a green pixel, and the third reference voltage generator 601C which generates reference voltage with respect to a red pixel. Each of the reference voltage generators generates reference voltages having reduction rates different from each other from the initial voltage levels different from each other in accordance with the color properties for which the individual generators are responsible.
The comparators 603A and 603B are disposed by the number of vertical columns (N columns) in total; for example, the comparator 603A is disposed in the odd-numbered column, and the comparator 603B is disposed in the even-numbered column. In accordance with this, the multiplexer 602A is disposed on the input side of the comparator 603A in the odd-numbered columns, and the multiplexer 602B is disposed on the input side of the comparator 603B in the even-numbered columns.
More specifically, the analog reference voltage generators which generate the reference signal that is decreased at different reduction rates from the initial voltage levels different from each other depending on the color pixels, and the selecting portions (multiplexers) which selectively output any one of the reference signals from the analog reference voltage generators at every comparator for each column are disposed.
The multiplexers 602A and 602B selectively output the output signals from the reference voltage generators 601A, 601B and 601C in response to the selection signal SEL. The comparators 603A and 603B compare the output signals from the multiplexers 602A and 602B with the analog signals from the pixel array 50.
In the case of the Bayer pattern, for example, since red pixels or green pixels are arranged on the odd-numbered column lines including the first column line, the third column line, and the fifth column line in the pixel array 50, the multiplexer 602A disposed for the odd-numbered column lines outputs one of the output signals in the second reference voltage generator 601B or the third reference voltage generator 601C depending on the color pixels. On the other hand, since green pixels or blue pixels are arranged on the even-numbered column lines including the second column line, the fourth column line, and the sixth column line, the multiplexer 602B disposed for the even-numbered column lines outputs one of the output signals from the first reference voltage generator 601A or the second reference voltage generator 601B depending on the color pixels.